Search
News
Careers
If you are looking forward to a career in the design of challenging circuits and systems in a result-oriented and technically-challenging work culture, Cosmic Circuits is the place to be. At Cosmic, you will rub shoulders with some of the best engineers in the circuit design fraternity, have the opportunity to innovate and develop new circuit designs and concepts, and be exposed to the chip-design & electronic systems industry around the world.
We welcome experienced engineers from the industry, PhDs, and freshers out of college with a Masters or Bachelors degree in electrical / electronics /communication engineering, having good understanding of electrical engineering and circuit design fundamentals and a strong interest in circuits and systems design and development.
If you see yourself wanting to be among the best in the semiconductor design Industry and are interested in creating history by being part of an emerging Indian semiconductor design company, feel free to reach us at resume@cosmiccircuits.com
Current Openings
- Digital Designers
- Digital Design Leads
- High Speed Connectivity - Application Engineer
- Analog Design Lead
- Analog Designers
- Physical Design Engineer
| Architecture and RTL | : Behavioral modeling, RTL, Synthesis |
| Verification | : Functional and Formal |
| Back End | : Synthesis, P&R , Timing closure, EMIR , SI |
| Test | : ATPG, Scan and BIST addition, Coverage enhancements |
Exposure to advanced technology nodes (40nm, 28nm) and their associated issues is desirable .
Knowledge in high-speed SERDES PHY or Controller design is desirable.
The candidate should possess strong engineering fundamentals, logic in particular. Should have a grasp of the basics of timing and should have a working knowledge of Verilog. System Verilog knowledge is a plus. Ability to work independently and coordinate with a team is a must. Knowledge of a scripting language (Python/Perl/Tcl) is a plus.
Working experience: 3-5 years is desirable, though if the candidate is good, we will make exceptions
| Architecture and RTL | : Behavioral modeling, RTL, Synthesis |
| Verification | : Functional and Formal |
| Back End | : Synthesis, P&R , Timing closure, EMIR , SI |
| Test | : ATPG, Scan and BIST addition, Coverage enhancements |
Exposure to advanced technology nodes (40nm, 28nm) and their associated issues is a must.
Knowledge in high-speed SERDES PHY or Controller design is a must. Standards-body, working-group contributions for any of the popular SERDES standards is desirable. The candidate should have proven experience leading RTL/Verification/Back-End/DFT teams.
Working experience: 7+ years is desirable, though if the candidate is good, we will make exceptions
High Speed Connectivity - Application Engineer
| FPGA | : Sound understanding of FPGA based emulation, hands-on experience with FPGA coding & synthesis |
| Hardware | : High speed board design & debug, practical experience with high speed test instruments (Scope, BERT) |
| Software | : Proficiency with Verilog HDL, C/C++, USB device drivers |
| System knowledge | : Protocol knowledge and debugging high speed systems such as USB, PCIe Gen2/Gen3 |
The candidate should possess strong engineering fundamentals. Should have a good understanding of high speed serial interface standards. Should have a working knowledge of FPGA and related software tools. Should be able to build and debug full system solution for high speed interfaces. Should have strong communication skills and ability to interact with multiple teams.
Working experience: 5-8 years is desirable, though if the candidate is good, we will make exceptions
Knowledge in high-speed SERDES PHY is a must. Standards-body, working-group contributions for any of the popular SERDES standards is desirable. The candidate should have proven experience leading analog/mixed-signal design teams with proven experience in leading designs from architecture to silicon characterization.
Working experience: 7+ years is desirable, though if the candidate is good, we will make exceptions
Knowledge in high-speed SERDES PHY or timing circuits (PLLs) is desired
The candidate should possess strong engineering fundamentals and should have expertise with various analog building blocks. Ability to work independently and coordinate with a team is a must.
Working experience: 3-5 years is desirable, though if the candidate is good, we will make exceptions
| Analog layout | : Sound understanding of Analog Layout, understanding of process technology. |
| EDA | : Proficiency with layout editor tool and all aspects of Physical verification. |
| Design knowledge | : Good understanding of Design constraints and should be able to analyze the impact of layout on the circuit design. |
The candidate should possess strong engineering fundamentals. Should have a good understanding of Analog Layout. Should have an expertise in Physical verification flows (LVS/DRC) and parasitic extraction flow. Good understanding of process technology. Should have strong communication skills and ability to interact with multiple teams.
Working experience: 3- 5 years is desirable, though if the candidate is good, we will make exceptions
Apply
Post your resume to resume@cosmiccircuits.com