When developing a custom Analog ASIC, it is important for you to have a predictable and controlled cost and cycle-time. A talented and fully staffed team certainly enables this, and enhanced significantly if the ASIC provider has a base of IP-cores that can be leveraged. The overall success of the project and the ability to get first-pass functional silicon is greatly enhanced by silicon IP-cores that can be used as is, or with straight-forward modifications.

As one of the leading providers of Analog IP, Cosmic Circuits has built a rich base of Analog IP cores, as illustrated below. These cores, numbering over 150, span various function types, such as Power-management, Audio Front Ends, A/D and D/A converters, LVDS interfaces, PLLs and Clocking functions, Communication Analog Front Ends, and Amplifier functions.

 

The Advantage Analog ASIC platform today supports a variety of application areas such as portable gadgets, portable communication chips, Wireless base-stations, LCD Panels, Medical Electronics, MEMS and sensors interface, touch sensing and PC peripherals. Examples of specific application areas are outlined below. However, we are open to newer application areas as well.

Foundry
Cosmic Circuits enjoys an ongoing relationship with all the leading foundries such as TSMC, UMC, Globalfoundries, IBM, Fujitsu, Samsung, and others. Owing to our partnership status with the foundries, we have easy access to the foundry process technology information, deeper silicon component information and trade-offs, regular design-kit updates, support from the foundry, special assistance, tight support for yield and production analysis, favorable terms and advance information about technology road maps. To our customers, these translate to a more optimal analog process selection, lower costs, shorter cycle times and quick reaction times when needed.

Sourcing & Operations
When it comes to sourcing wafers, packages or anything for that matter, Cosmic Circuits handles them on a turn-key basis. That means that our customers are free to focus on getting their end product developed and produced, and not have to de-focus away from it. This also means that analyzing and managing process yields, foundry process changes, periodic quality checks, and all related aspects are no longer the burden of our customers. As with a traditional ASIC model, we handle all of that.

Analog Process Options

 

Qualification
Our Product Engineering team in conjunction with the customer, defines the qualification criteria for every ASIC, keeping in mind the end application requirements. Standard practices are employed, be it ESD or Latchup qualification, or HTOL (High-Temperature-Operating-Life) qualifications.

Test
Test development for Analog Integrated Circuits is intimately tied to the design. Design-for-Test (DFT) features can address test coverage of embedded analog blocks and substantially improve the test coverage of analog circuits. Our analog test experts work with our test development partners and develop the complete test solution based on a detailed test plan. The test data from initial production lots is monitored closely by our experts to ensure high quality of delivered silicon. Our expertise covers multiple mixed signal ATE platforms such us Teradyne's Catalyst and Eagle's E364. Our goal is always to achieve low DDPM targeted for the specific application. This is achieved by optimal choice of DFT features on the chip, the right test platform and innovative test solutions for maximum test coverage at reasonable cost. Our strong test expertise includes obtaining good coverage with robust and efficient techniques for the following technologies. DC-Parametric Testing and @Speed testing are carried out using both proprietary and well-known mixed-signal test algorithm.

 

There are several advantages of such an approach. Our customers can stay assured that Cosmic absorbs a good part of risks such as the following:

• Mask spins or re-tape-outs
• Die-size increases Wafer cost fluctuations
• Supply allocation
• Tester and test-time variations
• Yield fluctuations

All of this translates to key business benefits for our customers:

• Reduced Time-To-Market risks
• Predictable development costs
• Reduced production risks
• Predictable unit cost, known up front

All-in-all, for our customers, it is a lot less worry and lot more predictability with a firm plan for achievement. At the same time, we recognize that the programs we undertake will be critical to our customers, and hence the need for visibility into the status. Towards this, our engagement model defines a systematic approach that provides the necessary visibility and involvement to our customers.

 

Our engagement steps are dictated by what is sensible and right for error-free product development, as well as the ease with which the process of engagement happens.

Starting from a high-level application requirement, our experts engage with our customers to refine the requirement into a detailed chip specification. This happens prior to a full-blown business engagement. After a contract is signed, key check-point reviews are performed to ensure that the customer gets exactly what was required. Critical reviews and sharing of simulation and silicon performance reports play a key role.

Periodic meetings by phone or mutual visits ensure that we stay in sync with the requirements.

We also expect our customers to perform thorough system-level testing and qualification using our engineering samples.

It is to Your Advantage…

Our Advantage Analog ASIC platform is advantageous to our customers, bringing a broad Analog IP base, a customized solution targeting the customer platform, a turn-key approach from Specification-to-Volume, and the ability and expertise to realize all of this.

We believe that our Advantage Analog ASIC platform brings our customers a high-confidence volume realizability of complex and innovative analog functions at reasonable costs and with least pain or hassle to our customers.